Semiconductor Conference Highlights Advanced Packaging as Key for AI Performance

On November 5, the 24th Annual Conference on Semiconductor Packaging and Testing Technology and Market was held in Nanjing. Representatives from OSAT leaders such as JCET, Tongfu Microelectronics and Huatian Technology, as well as from TSMC (Nanjing) Co., Ltd., argued that advanced packaging has shifted from a back-end step in IC manufacturing to a key factor in sustaining chip performance gains and supporting AI industry breakthroughs, as AI compute demand surges and Moore's Law slows.

Xiao Zhiyi, VP of Huatian Technology, said China's advanced packaging sector is entering a critical window in which it can move from following scale to leading technology. He noted that, driven by strong AI compute demand, the global semiconductor industry formally entered a new upcycle in 2025, and advanced packaging has become an independent strategic direction in China's IC self-reliance efforts, serving as an important lever for domestic chip iteration. Zhang Linglan, co-founder and COO of Biren Technology, argued that as model parameters keep growing and AI compute demand explodes, GPU dies are approaching the single-chip area limit, and performance gains increasingly depend on heterogeneous multi-chiple integration and HBM, making advanced packaging a decisive factor in AI system performance. A research note from Aijian Securities added that the packaging and testing sector has moved from a capacity utilization recovery toward improving volume and pricing.

The conference has concluded in Nanjing, and the statements above were disclosed on-site; no further developments have been reported so far.